INTRODUCTION

The optional Boundary Scan Test software available for the AP-114 ISP/JTAG Programmer is aimed at the diagnosis and debugging of complex PCB assemblies containing single or multiple embedded devices.

With older technologies, in-circuit testing is carried out by accessing the pins of a device directly, usually using test clips. But with recent developments in electronics, most PCB assemblies are highly populated and do not allow access to the pins of a device, as is the case in BGA packages for instance. The AP-114 gives you access to these devices that are bound to a JTAG chain with the purpose of carrying out testing, fault-finding and even programming operations. Boundary scan (or JTAG) is a widely recognised protocol implemented in most modern Programmable Logic Devices (eg CPLDs, FPGAs) and requires minimal hardware interface.
 

QUICK & EASY BOUNDARY SCAN TESTING

Using the boundary scan test protocol, individual pins of each device can be arbitrarily and safely monitored to determine their functionality. This operation can be carried out on static or active boards over a pre-defined period of time.

Information from a board can be stored and recalled by any user for simple verification of the device(s) on a chain (with pass/fail results) or deeper investigation using the graphical viewer and zoom features. Analysing this information can lead to the detection of :

• Manufacturing defects (eg. Open circuit/shorted pins)
  

• Logic errors (eg. pin failing to toggle/ faulty device)
  
• Programme errors (eg. incorrect/corrupted program)
  
• Faults in external circuitry (eg. missing or stuck input signal)

Automatic Functionality
The needs of a design engineer on a new project are different to those of a field engineer diagnosing a fault in-situ.

Therefore, various automatic functions and access levels are available with AP-114:

• Automatic Chain Detection reduces the time consuming process of identifying devices.
  

• Automatic Training lets the software learn the status of the board by itself (manual intervention is also possible)
  
• Automatic Data Comparison for quick evaluation with pass/fail results

 BOUNDARY SCAN DESCRIPTION LANGUAGE (BSDL)

Boundary Scan Description Language (BSDL) is a subset of VHDL that is used to describe how JTAG (IEEE 1149.1) is implemented in a particular device. For a device to be JTAG compliant, it must have an associated BSDL file. These files are often available for download from manufacturers' websites (see below). JTAG systems uses the information contained in a BSDL file to work out how to access a device in the JTAG chain. BSDL files contain the following elements:

• Entity Description: Statements naming the device or a section of its functionality.
  

• Generic Parameter: A value such as a package type. The value may come from outside the current entity.
  
• Port Description: Describes the nature of the pins on the device (input, output, bidirectional, linkage).
  
• Use Statements: References external definitions (such as IEEE 1149.1).
  
• Pin Mapping(s): Maps logical signals in the device to physical pins.
  
• Scan Port Identification: Defines the pins used on the device to access the JTAG capabilities (TDI, TDO, etc - the Test Access Port).
  
• Instruction Register Description: The signals used for accessing JTAG device modes.
  
• Register Access Description: Which register is placed between TDI and TDO for each JTAG instruction.
  
• Boundary Register Description: List of the boundary scan cells and their functionality

 DOWNLOAD BSDL FILES FOR YOUR JTAG COMPONENTS

Maxim
Micron
Mindspeed
Mosel Vitelic
Music Semiconductors
National Semiconductor
NEC
OKI
Philips
Phytec
PMC Sierra
QuickLogic
Renesas
Samsung
Silicon Laboratories
STMicroelectronics
Texas Instruments
Toshiba
Xilinx
Zarlink

SPECIFICATION

Computer Requirements

• PC with CD-ROM drive running Microsoft® Windows 2000, XP, Server 2003, Vista
  

• Pentium II or above
  
• Minimum RAM 512MB
  
• Hard Disk Space: 200MB
  
• USB interface ports (x2)
  
• Mouse, Keyboard & Monitor

Included Accessories

The Boundary Scan software is only for use with the AP-114 ISP/JTAG Programmer. It can be bought seperately as an optional upgrade or as a complete bundle. In addition to the USB and IDC cables, and programming software supplied with the AP-114, the following is included with the Boundary Scan software option:

• Software CD (incl. drivers and user manual)
  

• USB Activation Dongle

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